 |
|
| 產品簡介 |
|
|
|
| 240-pin socket type dual in line memory module (DIMM) Lead-free 1.8V power supply Data rate: 667Mbps 1.8V (SSTL_18 compatible) I/O Double-data-rate architecture: two data transfers perclock cycle Bi-directional, differential data strobe (DQS and /DQS) is transmitted/received with data, to be used in capturing data at the receiver DQS is edge aligned with data for READs: centeraligned with data for WRITEs Differential clock inputs (CK and /CK) DLL aligns DQ and DQS transitions with CK transitions Commands entered on each positive CK edge: data and data mask referenced to both edges of DQS Four internal banks for concurrent operation (Component) Data mask (DM) for write data Burst lengths: 4, 8 CAS Latency (CL): 3, 4, 5 Auto precharge operation for each burst access Auto refresh and self refresh modes 7.8us average periodic refresh interval Posted CAS by programmable additive latency for better command and data bus efficiency Off-Chip-Driver Impedance Adjustment and On-Die-Termination for better signal quality DQS can be disabled for single-ended Data Strobe operation |
|
|
|
